IC-PACKAGE THERMAL CO-ANALYSIS IN 3D IC ENVIRONMENT Conference paper (PDF)
نویسندگان
چکیده
Power on chip is highly temperature dependent in deep sub-micron VLSI. With increasing power density in modern 3D-IC and SiP, thermal induced reliability and performance issues such as leakage power and electromigration must be taken into consideration in the system level design. This paper presents a new methodology and its applications to accurately and efficiently predict power and temperature distribution for 3D ICs.
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